Ivy Bridge 3610qm pcie Graphics root port

[PushT]

I'm on a clevo p150em with a 7970m and a Intel 3610qm.
HWINFO64 reports PCIExpress version 1.1 on:
Intel Ivy Bridge DT - PCI Express Graphics root port[E1/L1/N0/P0]

Now that is kind of funny, seeing as:
max link width: x16
current link width: x16
max link speed: 2.5Gb/s
current link speed: 8.0Gb/s

- when running full performance settings on my system.
Processor is pcie 3.0 capable, 7970m is pcie 3.0 capable, chipset/mainboard is pcie 2.0 capable.
So even when system is idling and dynamic switching is downgrading this doesn't make sense.... I don't hav 1 single version 1.1 component on my system.
:huh:
I attached a zipped logfile here...

 

[Martin]

Without having a look at the HWiNFO Debug File, I cannot give you a precise answer. However, I suppose this is just a problem with capability reporting of the CPU PCIe Root Port and all is working well. Maybe a BIOS update might fix this issue.

 

[PushT]

Without having a look at the HWiNFO Debug File, I cannot give you a precise answer. However, I suppose this is just a problem with capability reporting of the CPU PCIe Root Port and all is working well. Maybe a BIOS update might fix this issue.

Here you are

 

[Martin]

According to the dump HWiNFO reports correct values how the PCIe devices are configured.
So this might be a BIOS problem, or maybe a limit set in the BIOS.

 

[PushT]

According to the dump HWiNFO reports correct values how the PCIe devices are configured.
So this might be a BIOS problem, or maybe a limit set in the BIOS.

I am running on a AMD enduro system, so it is clocking down when I am not using resources. I am attaching a new debug file for full load on my graphics.
Pc Wizard reports it right.....

 

[Martin]

Thanks, I see now.. The problem is that the PCI Express specification is not very clear about encoding of supported speeds and it seems the meaning is slightly different than I originally understood. I'll update HWiNFO to change the way how it reports this, so the next build should report this correctly.
Thanks for your feedback.

 

[PushT]

Thanks, I see now.. The problem is that the PCI Express specification is not very clear about encoding of supported speeds and it seems the meaning is slightly different than I originally understood. I'll update HWiNFO to change the way how it reports this, so the next build should report this correctly.
Thanks for your feedback.

Thank YOU for making a very useful tool for free use I am just generally interested in these things, and very thankful for your help

 

[Martin]

Please check the new beta release v4.13-1863 if it reports correctly now.

 

[PushT]

Please check the new beta release v4.13-1863 if it reports correctly now.

Yes Indeed
Looks good ! Thanks for your help - Nice to get that cleared up