Ryzen 7000 BCLK/eCLK readout - X670E Motherboad

crossbone

New Member
Cheers,

while experimenting with my new Ryzen platform I stumbled upson some BCLK weirdness.

System:
Ryzen 7 7700X
X670E Aorus Master

When Using the eCLK Option in the AORUS Master BIOS (Run CPU BCLK separate from PCIE and Rest BCLK) HWINFO64 seems to be very confused with the readouts. It reports 100 MHz BCLK although the BCLK was set to 103.7 MHz.
As a result of this, core clocks also show the wrong values, BUT - Core effective clocks show the real and correct values for the CPU Clock when loadad. See Core 3 T0 in my example, which is fully loaded with a super Pi workload and shows 5700 MHz.

Core Utility Further down below shows 122% as it seems to be related to Core clocks that are based on the 100 BCLK reading.
 

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Last edited:

Martin

HWiNFO Author
Staff member
We're aware of this issue and working with AMD and mainboard vendors on a solution.
Currently we have a workaround/solution for mainboards from ASUS and ASRock but other vendors didn't join yet.
AMD doesn't have a universal solution yet but we hope there will be something coming in the next BIOS versions...
 
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